Assembling (note GAS uses % instead of $ to denote registers) the following: vpblendvb %xmm4, %xmm3, %xmm2, %xmm1 with the GNU assembler (version 2.21.0.20110327 on x86_64 2.6.38 linux) and then disassembling yields: $ objdump -d a.out 0: c4 e3 69 4c cb 40 vpblendvb %xmm4,%xmm3,%xmm2,%xmm1 in intel syntax (as the manual shows): $ objdump -d … Read more
The difference is that with $ it’s the numeric value while without $ it’s the contents of memory at that address If argument of instruction is without any special marker (such as % for register or $ for numeric constant), then it is memory access. So following: movl 10, %eax movl foo, %eax Corresponds to … Read more
NASM/YASM is easy to distinguish from MASM/TASM/emu8086. YASM uses NASM syntax, with a few minor differences in what it accepts for constants and directives. I don’t know how to distinguish MASM from TASM, or TASM from emu8086, or FASM, so I’ll leave that for another answer to address. In NASM, explicit sizes on things like … Read more
It’s just call. Use Intel-syntax disassembly if you want to be able to look up instructions in the Intel/AMD manuals. (objdump -drwC -Mintel, GBD set disassembly-flavor intel, GCC -masm=intel) The q operand-size suffix does technically apply (it pushes a 64-bit return address and treats RIP as a 64-bit register), but there’s no way to override … Read more
It’s AT&T assembly syntax: source comes before destination mnemonic suffixes indicate the size of the operands (q for quad, etc.) registers are prefixed with % and immediate values with $ effective addresses are in the form DISP(BASE, INDEX, SCALE) (DISP + BASE + INDEX * SCALE) Indirect jump/call operands indicated with * (as opposed to … Read more
The next. That’s a general rule on x86 (see also branches). In Intel’s manual volume 2 section 2.2.1.6 RIP-Relative Addressing: A new addressing form, RIP-relative (relative instruction-pointer) addressing, is implemented in 64-bit mode. An effective address is formed by adding displacement to the 64-bit RIP of the next instruction.
AT&T syntax splits the movzx Intel instruction mnemonic into different mnemonics for different source sizes (movzb vs. movzw). In Intel syntax, it’s: movzx eax, byte ptr [eax+ecx+1] i.e. load a byte from memory at eax+ecx+1 and zero-extend to full register. BTW, most GNU tools now have a switch or a config option to prefer Intel … Read more