The reordering that GCC may do is unrelated to the reordering an (x86) CPU may do. Let’s start off with compiler reordering. The C language rules are such that GCC is forbidden from reordering volatile loads and store memory accesses with respect to each other, or deleting them, when a sequence point occurs between them … Read more
Intel CPUs after Core Duo support two Model-Specific registers called IA32_MPERF and IA32_APERF. MPERF counts at the maximum frequency the CPU supports, while APERF counts at the actual current frequency. The actual frequency is given by: You can read them with this flow ; read MPERF mov ecx, 0xe7 rdmsr mov mperf_var_lo, eax mov mperf_var_hi, … Read more
A CPU reads machine code and decodes it into internal control signals that send the right data to the right execution units. Most instructions map to one internal operation, and can be decoded directly. (e.g. on x86, add eax, edx just sends eax and edx to the integer ALU for an ADD operation, and puts … Read more
#include <unistd.h> long number_of_processors = sysconf(_SC_NPROCESSORS_ONLN);
var searcher = new ManagementObjectSearcher( “select MaxClockSpeed from Win32_Processor”); foreach (var item in searcher.Get()) { var clockSpeed = (uint)item[“MaxClockSpeed”]; } if you wish to get other fields look at class Win32_processor
This statement : the level-2 cache cannot prefetch more than one line at a time. is incorrect In fact, the L2 prefetchers are often stronger and more aggressive than L1 prefetchers. It depends on the actual machine you use, but Intels’ L2 prefetcher for e.g. can trigger 2 prefetches for each request, while the L1 … Read more
I just had the similar problem on the project with 3 servers/dispatchers running each on its own CPU core, spawning highly CPU intensive workers – which, at the same time, were designed to use specific core(s) they were running on to its fullest potential. I needed to assure that such worker process would never be … Read more
perf stat –all-user ./my_program on Linux will use CPU performance counters to record how many user-space instructions it ran, and how many core clock cycles it took. And how much CPU time it used, and will calculate average instructions per core clock cycle for you, e.g. 3,496,129,612 instructions:u # 2.61 insn per cycle It calculates … Read more
You can either use WMI or the System.Diagnostics namespace. From there you can grab any of the performance counters you wish (however it takes a second (1-1.5s) to initialize those – reading values is ok, only initialization is slow) Code can look then like this: using System.Diagnostics; public static Double Calculate(CounterSample oldSample, CounterSample newSample) { … Read more
TL:DR: memory ordering is not the same thing as out of order execution. It happens even on in-order pipelined CPUs. In-order commit is necessary1 for precise exceptions that can roll-back to exactly the instruction that faulted, without any instructions after that having already retired. The cardinal rule of out-of-order execution is don’t break single-threaded code. … Read more