HALT is just a “pseudo-instruction” for a TRAP instruction used to halt the machine. You could write: TRAP x25 ;HALT the machine But in this way you need to remember the position in the TRAP vector, in this case x25. So is better to just use HALT instead. Others common TRAPs also have pseduo-instructions: IN, … Read more
The simple way is to just read one byte, decode it and then determine if it’s a complete instruction. If not read another byte, decode it if necessary and then determine if a complete instruction has been read. If not continue reading/decoding bytes until the complete instruction is read. This means that if the instruction … Read more
You can write in PURE machine code manually WITHOUT ASSEMBLY Linux/ELF: https://github.com/XlogicX/m2elf. This is still a work in progress, I just started working on this yesterday. Source file for “Hello World” would look like this: b8 21 0a 00 00 #moving “!\n” into eax a3 0c 10 00 06 #moving eax into first memory location … Read more
There’s no hard and fast rule for x86 without a database as the instruction encoding is pretty complex (and the opcode itself can vary from 1 to 3 bytes). You can consult the Intel® 64 and IA-32 Architectures Software Developer’s Manual 2A document (Chapter 2: Instruction Format) to see how instructions and their operands are … Read more
NOSPLIT: Similarly, NASM will split [eax*2] into [eax+eax] because that allows the offset field to be absent and space to be saved; in fact, it will also split [eax*2+offset] into [eax+eax+offset]. You can combat this behaviour by the use of the NOSPLIT keyword: [nosplit eax*2] will force [eax*2+0] to be generated literally. [nosplit eax*1] also … Read more
@AlexisWilke’s response is right: this is messy. He provides the right insights and references to do the work, too. I have done this work in C. The code follows; this is used in production contexts. Caveats: It does a good part of the traditional x86 instruction set, but not all, in particular none of the … Read more
rep; nop is indeed the same as the pause instruction (opcode F390). It might be used for assemblers which don’t support the pause instruction yet. On previous processors, this simply did nothing, just like nop but in two bytes. On new processors which support hyperthreading, it is used as a hint to the processor that … Read more
There’s no hard and fast rule for x86 without a database as the instruction encoding is pretty complex (and the opcode itself can vary from 1 to 3 bytes). You can consult the Intel® 64 and IA-32 Architectures Software Developer’s Manual 2A document (Chapter 2: Instruction Format) to see how instructions and their operands are … Read more
The terms are indeed a bit confusing, because they are sometimes used inconsistently. Machine code: This is the most well-defined one. It is code that uses the byte-code instructions which your processor (the physical piece of metal that does the actual work) understands and executes directly. All other code must be translated or transformed into … Read more