processor

How do cache lines work?

If the cache line containing the byte or word you’re loading is not already present in the cache, your CPU will request the 64 bytes that begin at the cache line boundary (the largest address below the one you need that is multiple of 64). Modern PC memory modules transfer 64 bits (8 bytes) at … Read more

size of int variable

It depends on the implementation. The only thing the C standard guarantees is that sizeof(char) == 1 and sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long) <= sizeof(long long) and also some representable minimum values for the types, which imply that char is at least 8 bits long, int is at least 16 bit, etc. So … Read more

CPU and Data alignment

CPUs are word oriented, not byte oriented. In a simple CPU, memory is generally configured to return one word (32bits, 64bits, etc) per address strobe, where the bottom two (or more) address lines are generally don’t-care bits. Intel CPUs can perform accesses on non-word boundries for many instructions, however there is a performance penalty as … Read more

Determine word size of my processor

Your assumption about sizeof(int) is untrue; see this. Since you must know the processor, OS and compiler at compilation time, the word size can be inferred using predefined architecture/OS/compiler macros provided by the compiler. However while on simpler and most RISC processors, word size, bus width, register size and memory organisation are often consistently one … Read more