This should do it: SOURCES = $(wildcard *.cpp) $(wildcard */*.cpp) If you change you mind and want a recursive solution (i.e. to any depth), it can be done but it involves some of the more powerful Make functions. You know, the ones that allow you to do things you really shouldn’t. EDIT: Jack Kelly points … Read more
It is actually executing the command, changing the directory to some_directory, however, this is performed in a sub-process shell, and affects neither make nor the shell you’re working from. If you’re looking to perform more tasks within some_directory, you need to add a semi-colon and append the other commands as well. Note that you cannot … Read more
Here’s the Makefile I’ve added to the documentation (currently in review so I’ll post it here) : # Set project directory one level above the Makefile directory. $(CURDIR) is a GNU make variable containing the path to the current working directory PROJDIR := $(realpath $(CURDIR)/..) SOURCEDIR := $(PROJDIR)/Sources BUILDDIR := $(PROJDIR)/Build # Name of the … Read more
Let’s take a look at the generated Makefile! First, the install target: install: altinstall bininstall maninstall It does everything altinstall does, along with bininstall and maninstall Here’s bininstall; it just creates the python and other symbolic links. # Install the interpreter by creating a symlink chain: # $(PYTHON) -> python2 -> python$(VERSION)) # Also create … Read more
The first attempt runs the command i with the parameters = and 2. A proper assignment in the shell has no spaces on either side of the equals sign. Your second problem is that a recipe on two physical lines will run two unrelated shell instances. The first sets a variable to a value, then … Read more
Thanks to Alex (see answer) i went further in my search. What i found is that it is recorded in TODO.private of make project for 15 years …. Using git://git.savannah.gnu.org/make.git you can see history of TODO.private content : 6) Right now the .PRECIOUS, .INTERMEDIATE, and .SECONDARY pseudo-targets have different capabilities. For example, .PRECIOUS can take … Read more
Here is an example makefile for you, tested on your github project. Features: Automatic dependency generation. Automatic rebuild when Makefile is changed. Debug/release builds in different directories. Debug build is the default, use make BUILD=release for release builds. Supports gcc and clang. gcc is the default, use make COMPILER=clang for clang. clean target works by … Read more
If you’re sure that’s really what you want, here’s one way to do it: have a rule for a dummy file which the makefile will include. .PHONY: dummy dummy: # generate the file here -include dummy No matter what target you specify, Make will first run the dummy rule, then restart itself.
First of all, you are looking at the contents of a variable that is named after the current path, which is probably not what you want. A simple environment variable reference is $(name) or ${name}, not $(${name}). Due to this, line 13 is always evaluated. Second, I think it is choking on the indentation of … Read more
-O2 would be an option to make (or $(MAKE), as you’re using it) in what you tried. Obviously, the compiler (probably gcc) needs this flag, not make. Kbuild understands a make variable named CFLAGS_modulename.o to add specific C flags when compiling this unit. In your case, your module object will be jc.o, so you can … Read more