How to run code from RAM on ARM architecture

On GCC: Just put the function in the .data section: __attribute__( ( section(“.data”) ) ) It will be copied over with the rest of your initialzed variables by the startup code (no need to mess with the linker scipt). You may also need a “long_call” option as well if the function ends up “far away” … Read more

Why unsigned types are more efficient in arm cpu?

Prior to ARMv4, ARM had no native support for loading halfwords and signed bytes. To load a signed byte you had to LDRB then sign extend the value (LSL it up then ASR it back down). This is painful so char is unsigned by default. In ARMv4 instructions were added to handle halfwords and signed … Read more

Explicitly accessing banked registers on ARM

The correct syntax for this is mrs r2,sp_svc or mrs r3, sp_usr. This is a new armv7 extension. The code can be seen in the ARM Linux KVM source file interrupt_head.S. The gas binutils patch for this instruction support by Matthew Gretton-Dann. It requires the virtualization extensions are far as I understand. According to what … Read more

Arm Neon Intrinsics vs hand assembly

My experience is that the intrinsics haven’t really been worth the trouble. It’s too easy for the compiler to inject extra register unload/load steps between your intrinsics. The effort to get it to stop doing that is more complicated than just writing the stuff in raw NEON. I’ve seen this kind of stuff in pretty … Read more

What is the difference between FIQ and IRQ interrupt system?

ARM calls FIQ the fast interrupt, with the implication that IRQ is normal priority. In any real system, there will be many more sources of interrupts than just two devices and there will therefore be some external hardware interrupt controller which allows masking, prioritization etc. of these multiple sources and which drives the interrupt request … Read more