Has Hardware Lock Elision gone forever due to Spectre Mitigation?

So, TSX may be disabled not to mitigate Spectre, but as a part of another vulnerability mitigation, TSX Asynchronous Abort (TAA). Here’s relevant article on Intel website: IntelĀ® Transactional Synchronization Extensions (IntelĀ® TSX) Asynchronous Abort / CVE-2019-11135 / INTEL-SA-00270 Which links to two more detailed articles: TSX Asynchronous Abort (TAA) CVE-2019-11135 Microarchitectural Store Buffer Data … Read more

Out-of-order execution vs. speculative execution

Speculative execution and out-of-order execution are orthogonal. One could design a processor that is OoO but not speculative or speculative but in-order. OoO execution is an execution model in which instructions can be dispatched to execution units in an order that is potentially different from the program order. However, the instructions are still retired in … Read more

Can a speculatively executed CPU branch contain opcodes that access RAM?

The cardinal rules of speculative out-of-order (OoO) execution are: Preserve the illusion of instructions running sequentially, in program order Make sure speculation is contained to things that can be rolled back if mis-speculation is detected, and that can’t be observed by other cores to be holding a wrong value. Physical registers, the back-end itself that … Read more