how does push and pop work in assembly
The latter POP EBP is equivalent to MOV EBP, [ESP] ADD ESP, 4 ; but without modifying flags, like LEA ESP, [ESP+4] (in Intel syntax – target on the left, source on the right)
The latter POP EBP is equivalent to MOV EBP, [ESP] ADD ESP, 4 ; but without modifying flags, like LEA ESP, [ESP+4] (in Intel syntax – target on the left, source on the right)
Carry flag is carry or borrow out of the Most Significant bit (MSb): CF (bit 0) Carry flag — Set if an arithmetic operation generates a carry or a borrow out of the mostsignificant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision … Read more
You’re running into one surprising difference between i386 and x86_64: they don’t use the same system call mechanism. The correct code is: movq $60, %rax movq $2, %rdi ; not %rbx! syscall Interrupt 0x80 always invokes 32-bit system calls. It’s used to allow 32-bit applications to run on 64-bit systems. For the purposes of learning, … Read more
Intel CPUs after Core Duo support two Model-Specific registers called IA32_MPERF and IA32_APERF. MPERF counts at the maximum frequency the CPU supports, while APERF counts at the actual current frequency. The actual frequency is given by: You can read them with this flow ; read MPERF mov ecx, 0xe7 rdmsr mov mperf_var_lo, eax mov mperf_var_hi, … Read more
Right-click the project, not the solution. Then Build Dependencies + Build Customizations. You get the dialog, tick “masm”.
4×4 matrix multiplication is 64 multiplications and 48 additions. Using SSE this can be reduced to 16 multiplications and 12 additions (and 16 broadcasts). The following code will do this for you. It only requires SSE (#include <xmmintrin.h>). The arrays A, B, and C need to be 16 byte aligned. Using horizontal instructions such as … Read more
Although there is already an accepted answer, there are a few things that where missed that could be used to improve all the answers, taken from this Intel article, all above fast lock implementation: Spin on a volatile read, not an atomic instruction, this avoids unneeded bus locking, especially on highly contended locks. Use back-off … Read more
In 64-bit mode you cannot push and pop 32-bit values; you need pushq and popq. Also, you will not get a proper exit this way. On 32-bit x86, you would need to set %eax to 1 to select the exit() system call, and set %ebx to the exit code you actually wish. On 64-bit x86 … Read more
You’ll need the Linux kernel sources in order to see the actual source of the system calls. Manual pages, if installed on your local system, only contain the documentation of the calls and not their source itself. Unfortunately for you, system calls aren’t stored in just one particular location in the whole kernel tree. This … Read more
See Why Does GCC LEA EIZ?: Apparently %eiz is a pseudo-register that just evaluates to zero at all times (like r0 on MIPS). … I eventually found a mailing list post by binutils guru Ian Lance Taylor that reveals the answer. Sometimes GCC inserts NOP instructions into the code stream to ensure proper alignment and … Read more