RIP addressing is always relative to RIP (64bit Instruction Pointer) register. So it can be use for global variables only. The 0 offset is equal to address of the following instruction after the RIP-addressed instruction. For example: mov al,[rip+2] al=53 jmp short next (length=2 bytes) db 53 next: mov bl,[rip-7] (length=6 bytes) bl=53 You wouldn’t … Read more
I believe that you want to load the address of your string into %rsi; your code attempts to load a quadword from that address rather than the address itself. You want: lea msg(%rip), %rsi if I’m not mistaken. I don’t have a linux box to test on, however.
The next. That’s a general rule on x86 (see also branches). In Intel’s manual volume 2 section 2.2.1.6 RIP-Relative Addressing: A new addressing form, RIP-relative (relative instruction-pointer) addressing, is implemented in 64-bit mode. An effective address is formed by adding displacement to the 64-bit RIP of the next instruction.
It’s a nasty bit of legacy abstraction leakage. The original ARM design had a 3-stage pipeline (fetch-decode-execute). To simplify the design they chose to have the PC read as the value currently on the instruction fetch address lines, rather than that of the currently executing instruction from 2 cycles ago. Since most PC-relative addresses are … Read more