x86 Assembly – Why is [e]bx preserved in calling conventions?

by

Not all registers make good candidates for preserving:

no (e)ax -- Implicitly used in some instructions; Return value
no (e)dx -- edx:eax is implicity used in cdq, div, mul and in return values

   (e)bx -- generic register, usable in 16-bit addressing modes (base)
   (e)cx -- shift-counts, used in loop, rep

   (e)si -- movs operations, usable in 16-bit addressing modes (index)
   (e)di -- movs operations, usable in 16-bit addressing modes (index)

Must (e)bp -- frame pointer, usable in 16-bit addressing modes (base)
Must (e)sp -- stack pointer, not addressable in 8086 (other than push/pop)

Looking at the table, two registers have good reason to be preserved and two have a reason not to be preserved. accumulator = (e)ax e.g. is the most often used register due to short encoding. SI,DI make a logical register pair — on REP MOVS and other string operations, both are trashed.

In a half and half callee/caller saving paradigm the discussion would basically go only if bx/cx is preferred over si/di. In other calling conventions, it’s just EDX,EAX and ECX that can be trashed.

EBX does have a few obscure implicit uses that are still relevant in modern code (e.g. CMPXGH8B / CMPXGH16B), but it’s the least special register in 32/64-bit code.

EBX makes a good choice for a call-preserved register because it’s rare that a function will need to save/restore EBX because they need EBX specifically, and not just any non-volatile register. As Brett Hale’s answer points out, it makes EBX a great choice for the global offset table (GOT) pointer in ABIs that need one.

In 16-bit mode, addressing modes were limited to (any subset of) [BP|BX + DI|SI + disp8/disp16]), so BX is definitely special there.

More Related Contents:

  1. What registers must be preserved by an x86 function?
  2. Why not store function parameters in XMM vector registers?
  3. Micro fusion and addressing modes
  4. Why doesn’t GCC use partial registers?
  5. Why should EDX be 0 before using the DIV instruction?
  6. Custom bootloader booted via USB drive produces incorrect output on some computers
  7. A couple of questions about [base + index*scale + disp] and AT&T disp(base, index, scale)
  8. rbp not allowed as SIB base?
  9. How to read the Intel Opcode notation
  10. What does cltq do in assembly?
  11. Bomb lab phase 5 – 6 char string, movzbl load, and $0xf, %ecx, and index an array with that?
  12. execve shellcode writing segmentation fault
  13. double condition checking in assembly
  14. Printing hex values in x86 assembly
  15. How exactly does the callstack work?
  16. What does the dollar sign ($) mean in x86 assembly when calculating string lengths like “$ – label”? [duplicate]
  17. Subtract a variable from a register? error A2022: instruction operands must be the same size
  18. How to interpret objdump disassembly output columns?
  19. x86 LOCK question on multi-core CPUs
  20. Weird performance effects from nearby dependent stores in a pointer-chasing loop on IvyBridge. Adding an extra load speeds it up?
  21. How do vararg functions find out the number of arguments in machine code?
  22. Difference between MOVDQA and MOVAPS x86 instructions?
  23. Where is VPERMB in AVX2?
  24. Cannot move 8 bit address to 16 bit register
  25. Is a mov to a segmentation register slower than a mov to a general purpose register?
  26. What is callq instruction?
  27. MUL function in assembly
  28. How is POPCNT implemented in hardware?
  29. Solution needed for building a static IDT and GDT at assemble/compile/link time
  30. What is register %eiz?

Leave a Comment