What registers must be preserved by an x86 function?

by

More Related Contents:

  1. Why not store function parameters in XMM vector registers?
  2. x86 Assembly – Why is [e]bx preserved in calling conventions?
  3. Micro fusion and addressing modes
  4. Why doesn’t GCC use partial registers?
  5. Custom bootloader booted via USB drive produces incorrect output on some computers
  6. A couple of questions about [base + index*scale + disp] and AT&T disp(base, index, scale)
  7. rbp not allowed as SIB base?
  8. What does cltq do in assembly?
  9. Bomb lab phase 5 – 6 char string, movzbl load, and $0xf, %ecx, and index an array with that?
  10. What does “int 0x80” mean in assembly code?
  11. x86-32 / x86-64 polyglot machine-code fragment that detects 64bit mode at run-time?
  12. What are the segment and offset in real mode memory addressing?
  13. Do terms like direct/indirect addressing mode actual exists in the Intel x86 manuals
  14. Does it make any sense to use the LFENCE instruction on x86/x86_64 processors?
  15. What is the x86 “ret” instruction equivalent to?
  16. Assembly difference between [var], and var
  17. What does `dword ptr` mean?
  18. 8086 random number generator (not just using the system time)?
  19. Why are x86 registers named the way they are?
  20. Carry Flag, Auxiliary Flag and Overflow Flag in Assembly
  21. What is instruction fusion in contemporary x86 processors?
  22. call subroutines conditionally in assembly
  23. Using 8-bit registers in x86-64 indexed addressing modes
  24. Is there a specification of x86 I/O port assignment?
  25. Cannot move 8 bit address to 16 bit register
  26. Is a mov to a segmentation register slower than a mov to a general purpose register?
  27. MUL function in assembly
  28. How is POPCNT implemented in hardware?
  29. Solution needed for building a static IDT and GDT at assemble/compile/link time
  30. What is register %eiz?

Leave a Comment