GNU Makefile rule generating a few targets from a single source file

by

The trick is to use a pattern rule with multiple targets. In that case make will assume that both targets are created by a single invocation of the command.

all: file-a.out file-b.out
file-a%out file-b%out: input.in
    foo-bin input.in file-a$*out file-b$*out

This difference in interpretation between pattern rules and normal rules doesn’t exactly make sense, but it’s useful for cases like this, and it is documented in the manual.

This trick can be used for any number of output files as long as their names have some common substring for the % to match. (In this case the common substring is “.”)

More Related Contents:

  1. What is the purpose of .PHONY in a Makefile?
  2. Creating Makefile with libraries
  3. OS detecting makefile
  4. Recursive wildcards in GNU make?
  5. How to place object files in separate subdirectory
  6. How to generate a Makefile with source in sub-directories using just one makefile
  7. Passing arguments to “make run”
  8. How does “make” app know default target to build if no target is specified?
  9. Getting make to create object files in a specific directory
  10. How to write loop in a Makefile?
  11. How to use all *.c files in a directory with the Cmake build system?
  12. What’s the opposite of ‘make install’, i.e. how do you uninstall a library in Linux?
  13. How to use LDFLAGS in makefile
  14. How do you get the list of targets in a makefile?
  15. “multiple target patterns” Makefile error
  16. How do I check if file exists in Makefile so I can delete it?
  17. Is it possible to set CFLAGS to a linux kernel module Makefile?
  18. How to ensure a target is run before all the other build rules in a makefile?
  19. Building C-program “out of source tree” with GNU make
  20. What are Makefile.am and Makefile.in?
  21. How can I configure my makefile for debug and release builds?
  22. Run make in each subdirectory
  23. CFLAGS vs CPPFLAGS
  24. CMAKE_MAKE_PROGRAM not found
  25. Wildcard targets in a Makefile
  26. How do I perform arithmetic in a makefile?
  27. Suppress make rule error output
  28. How to print out a variable in makefile
  29. Make error of mixed implicit and normal rules
  30. Generic rule from makefile to CMake

Leave a Comment