Answer recommended by Intel
More Related Contents:
- What’s the best way to remember the x86-64 System V arg register order?
- What are the calling conventions for UNIX & Linux system calls (and user-space functions) on i386 and x86-64
- Where is the x86-64 System V ABI documented?
- Why does Windows64 use a different calling convention from all other OSes on x86-64?
- What registers are preserved through a linux x86-64 function call
- What are callee and caller saved registers?
- Why does the x86-64 / AMD64 System V ABI mandate a 16 byte stack alignment?
- Is a sign or zero extension required when adding a 32bit offset to a pointer for the x86-64 ABI?
- How to print a single-precision float with printf
- What is the ‘shadow space’ in x64 assembly?
- Why does the x86-64 GCC function prologue allocate less stack than the local variables?
- Why not store function parameters in XMM vector registers?
- Does each PUSH instruction push a multiple of 8 bytes on x64?
- C++ on x86-64: when are structs/classes passed and returned in registers?
- How do vararg functions find out the number of arguments in machine code?
- rsp doesn’t move when entering new function [duplicate]
- Is reserving stack space necessary for functions less than four arguments?
- What considerations go into predicting latency for operations on modern superscalar processors and how can I calculate them by hand?
- glibc scanf Segmentation faults when called from a function that doesn’t align RSP
- Why in x86-64 the virtual address are 4 bits shorter than physical (48 bits vs. 52 long)?
- Printing floating point numbers from x86-64 seems to require %rbp to be saved
- Why are rbp and rsp called general purpose registers?
- Why NASM on Linux changes registers in x86_64 assembly
- What are the names of the new X86_64 processors registers?
- what does “mov offset(%rip), %rax” do?
- Why does the x86-64 System V calling convention pass args in registers instead of just the stack?
- Load from a 64-bit address into other register than rax
- x86 32 bit opcodes that differ in x86-x64 or entirely removed
- What is the compatible subset of Intel’s and AMD’s x86-64 implementations?
- nasm idiv a negative value