What are the names of the new X86_64 processors registers?

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  1. Why do x86-64 instructions on 32-bit registers zero the upper part of the full 64-bit register?
  2. What do the E and R prefixes stand for in the names of Intel 32-bit and 64-bit registers?
  3. Why can I access lower dword/word/byte in a register but not higher?
  4. What’s the purpose of the LEA instruction?
  5. Why doesn’t GCC use partial registers?
  6. How do AX, AH, AL map onto EAX?
  7. rbp not allowed as SIB base?
  8. Why is there not a register that contains the higher bytes of EAX?
  9. Why are rbp and rsp called general purpose registers?
  10. Why is (or isn’t?) SFENCE + LFENCE equivalent to MFENCE?
  11. Why is imul used for multiplying unsigned numbers?
  12. x64 instruction encoding and the ModRM byte
  13. Assembly registers in 64-bit architecture
  14. x86_64 registers rax/eax/ax/al overwriting full register contents [duplicate]
  15. Does it make any sense to use the LFENCE instruction on x86/x86_64 processors?
  16. Why not store function parameters in XMM vector registers?
  17. How to determine if the registers are loaded right to left or vice versa
  18. How to multiply a register by 37 using only 2 consecutive leal instructions in x86?
  19. x86 Calculating AX given AH and AL?
  20. What does “rep; nop;” mean in x86 assembly? Is it the same as the “pause” instruction?
  21. When should I use size directives in x86?
  22. Why are x86 registers named the way they are?
  23. Using 8-bit registers in x86-64 indexed addressing modes
  24. What is the purpose of segment registers in x86 protected mode?
  25. What’s the best way to remember the x86-64 System V arg register order?
  26. What is callq instruction?
  27. Why use RIP-relative addressing in NASM?
  28. Assembly x86 registers signed or unsigned
  29. How to know if a register is a “general purpose register”?
  30. x86 Assembly pushl/popl don’t work with “Error: suffix or operands invalid”

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