Something i found * EAX – Accumulator Register * EBX – Base Register * ECX – Counter Register * EDX – Data Register * ESI – Source Index * EDI – Destination Index * EBP – Base Pointer * ESP – Stack Pointer
As suggested by Peter Cordes, I would imagine the data as hexadecimal values: RR RR RR RR EE EE HH LL | | || || | | || AL | | AH | | | |___| | | AX | | |_________| | EAX | |_____________________| RAX …where RAX is the 64-bit register which exists … Read more
You can’t access it directly because there’s no legitimate use case. Having any arbitrary instruction change eip would make branch prediction very difficult, and would probably open up a whole host of security issues. You can edit eip using jmp, call or ret. You just can’t directly read from or write to eip using normal … Read more
info registers shows all the registers; info registers eax shows just the register eax. The command can be abbreviated as i r
On the 8086 (and 16-bit addressing in x86), only the following addressing modes are available: [bx] [bx + foo] [foo] [bp + foo] [si] [si + foo] [di] [di + foo] [bx + si] [bx + si + foo] [bx + di] [bx + di + foo] [bp + si] [bp + si + foo] … Read more
Straight from Intel, here’s an explanation of how recent processors maintain a TSC that ticks at a constant rate, is synchronous between cores and packages on a multi-socket motherboard, and may even continue ticking when the processor goes into a deep sleep C-state, in particular see the explanation by Vipin Kumar E K (Intel): http://software.intel.com/en-us/articles/best-timing-function-for-measuring-ipp-api-timing/ … Read more
Editor’s note: this way of using a local register-asm variable is now documented by GCC as “not supported”. It still usually happens to work on GCC, but breaks with clang. (This wording in the documentation was added after this answer was posted, I think.) The global fixed-register variable version has a large performance cost for … Read more