Why is GCC pushing an extra return address on the stack?

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  1. Why doesn’t GCC use partial registers?
  2. Why does the x86-64 / AMD64 System V ABI mandate a 16 byte stack alignment?
  3. How do you use gcc to generate assembly code in Intel syntax?
  4. What does it mean to align the stack?
  5. What is the function of the push / pop instructions used on registers in x86 assembly?
  6. What is an assembly-level representation of pushl/popl %esp?
  7. Does it matter where the ret instruction is called in a procedure in x86 assembly
  8. Responsibility of stack alignment in 32-bit x86 assembly
  9. how does push and pop work in assembly
  10. A couple of questions about [base + index*scale + disp] and AT&T disp(base, index, scale)
  11. What does cltq do in assembly?
  12. Bomb lab phase 5 – 6 char string, movzbl load, and $0xf, %ecx, and index an array with that?
  13. Difference in performance between MSVC and GCC for highly optimized matrix multplication code
  14. Printing hex values in x86 assembly
  15. Does it make any sense to use the LFENCE instruction on x86/x86_64 processors?
  16. What is the x86 “ret” instruction equivalent to?
  17. Assembly difference between [var], and var
  18. 8086 random number generator (not just using the system time)?
  19. Why are x86 registers named the way they are?
  20. Carry Flag, Auxiliary Flag and Overflow Flag in Assembly
  21. call subroutines conditionally in assembly
  22. Using 8-bit registers in x86-64 indexed addressing modes
  23. Is there a specification of x86 I/O port assignment?
  24. Cannot move 8 bit address to 16 bit register
  25. Is a mov to a segmentation register slower than a mov to a general purpose register?
  26. MUL function in assembly
  27. How is POPCNT implemented in hardware?
  28. What is the effect of second argument in _builtin_prefetch()?
  29. Solution needed for building a static IDT and GDT at assemble/compile/link time
  30. What is register %eiz?

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