Does cmpxchg write destination cache line on failure? If not, is it better than xchg for spinlock?

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  3. What does `rep ret` mean?
  4. Does a memory barrier ensure that the cache coherence has been completed?
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  11. What’s the purpose of the LEA instruction?
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  20. Why is (or isn’t?) SFENCE + LFENCE equivalent to MFENCE?
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  24. Why do we need to disambiguate when adding an immediate value to a value at a memory address
  25. How to determine if ModR/M is needed through Opcodes?
  26. How to multiply a register by 37 using only 2 consecutive leal instructions in x86?
  27. What does “rep; nop;” mean in x86 assembly? Is it the same as the “pause” instruction?
  28. Convert string to int. x86 32 bit Assembler using Nasm
  29. Multiplying arbitrarily long sequences of ASCII digits by a single-digit multiplier
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